The present invention relates to a multilevel voltage driving device for a liquid crystal display (LCD).
In a thin film transistor-liquid crystal display (TFT-LCD), image display is performed by active control on individual pixels on a display panel with a preset TFT array thereon.
FIG. 1 is a schematic diagram showing the circuit connection of a pixel in the liquid crystal display panel, which comprises a TFT 101. The gate G of the TFT 101 is connected with a scan line SL, the drain D is connected with a data line DL, and the source S is connected with a pixel electrode and a storage capacitor Cst. In addition, the pixel electrode, a counter electrode, and a liquid crystal layer interposed therebetween together form a liquid crystal capacitor CLC. The pixel electrode of the liquid crystal capacitor CLC is connected with the source S of the TFT 101, and the counter electrode is connected with a common electrode VCOM.
When the pixel is charged, as shown in FIG. 2, the scan line is at a high level, which is typically about 20 V, so that with the level over the data line output from the source driving IC, the liquid crystal capacitor CLC and the storage capacitor Cst is charged through the TFT 101. When the level on the liquid crystal capacitor CLC reaches a predetermined value, the scan line SL is switched to a low level and the TFT 101 is turned off. In order to completely turn off the TFT 101, a low level of −5V˜−10V should be maintained on the scan line SL. When the TFT 101 is turned off, the level across the pixel is maintained. When the scan line SL is switched to a high level upon the next scanning, the corresponding TFT will be turned on again, and the corresponding pixel will be charged or discharged.
When the pixel is charged, a scan line level of about 20-30V, which is higher than that applied to the pixel after the charging is completed, is applied to the gate G of the TFT 101. Since during the process of charging, a parasitic capacitor Cgs is produced between the gate G and the source S of the TFT 101, so that the charge/discharge direction of the parasitic capacitor Cgs changes as the level on the scan line changes from a high level to a low level. At the instant when the TFT 101 is turned off, the polarity of the parasitic capacitor Cgs will be changed and the charges between the liquid crystal capacitor CLC and the storage capacitor Cst will be redistributed. As a result, at the instant when the scan line turns from the high level to the low one, the level across the liquid crystal layer forms a jump level ΔVp, which changes with the level change on the scan line according to the following expression:
      Δ    ⁢                  ⁢          V      p        =                    C        gs                              C          gs                +                  C          LC                +                  C          st                      ⁢    Δ    ⁢                  ⁢          V      g      where ΔVg is the level difference between the high level and the low level on the scan line.
Due to presence of the jump level ΔVp, it is prone to give rise to flickering of the liquid crystal display panel. In a conventional technology, a multilevel voltage is usually adopted to reduce the value of the jump level ΔVp. FIG. 3 shows the charging diagram after a multilevel voltage is applied to the data line. When the scan line is changed from the high level to the low level, an intermediate level is inserted between the high level and the low level. Since the difference between the high level and the intermediate level is relatively small, ΔVp 1 is also small. At this time, the TFT is not turned off yet, and with the level on the data line, the pixel is charged continuously through the TFT, so that the level across the pixel will continue to increase by ΔV again. Next, the level on the scan line further is changed from the intermediate level to a negative level so as to turn off the TFT, and a jump level ΔVp2 is also generated across the pixel. Therefore, the jump level across the pixel during the whole process is ΔVP=ΔVP1−ΔV+ΔVP2. It can be seen that the jump level ΔVp across the pixel becomes smaller after the scan line takes a multilevel voltage.
The drawbacks of the conventional method lies in that the driving device used to produce a multilevel voltage on the scan line is realized with an integrated operational amplifier, and the relatively high cost of the integrated operational amplifier correspondingly results in the high cost of the current multilevel voltage driving device.